A Low-Noise Measuring Amplifier

A low-noise amplifier (LNA) with high gain is a useful tool in any laboratory. Typical applications include characterizing noise in voltage regulators (LDOs), power supplies, and VCO control voltages, as well as evaluating individual components like resistors and semiconductor devices. Additionally, when paired with an oscilloscope, it enables the precise measurement of small RMS voltages. The objective of this project was to design an amplifier with a useful bandwidth up to at least 100 kHz, matching the standard frequency range used for LDO characterization.

In line with these intended purposes, the amplifier must primarily exhibit low voltage noise. Since this generally results in higher current noise, the amplifier is optimized for sources with low output impedance. The circuit design presented features the following key specifications:

The methods used to obtain these data are described below, along with detailed curves and the corresponding analysis scripts.

The amplifier is housed in an EMI shielded box and is powered from two 9.6 V NiMH battery packs in order to achieve its noise characteristics, and to avoid unwanted spurs at the output. A low-battery indication is provided when at least one of the two supply voltages is lower than 8 V. A charging socket (M8, 3-pin) is provided, allowing the amplifier to be charged using a dual laboratory power supply.

Mechanical construction

The amplifier is built on a single 105×101 mm four layer board. It is housed in a Hammond model 1457 N 1601 E extruded aluminium enclosure. For EMC reasons, this housing is a closed tube, without a sliding lid. The anodized front and rear panels, featuring UV printing, are custom-manufactured from 3 mm aluminum sheet for rigidity, and have a chromated backside. This ensures good electrical contact with the EMI gasket between the panel and the enclosure.

The front and rear panels have been manufactured by Schaeffer AG from Berlin, using their software “Frontplatten-Designer”. The board was designed with KiCad version 10.0.4 and manufactured by JLCPCB with their impedance controlled process using prepreg type 7628 (although impedance control is not necessary here). The four layer board allows for a continuous ground plane, and hence good EMC properties.

There should be sufficient space in the enclosure for two NiMH battery packs in a 2×4 arrangement of eight AAA cells. However, for simplicity I went with two 9.6 V NiMH block batteries from Powerex. These have a capacity of only 230 mAh each, and with a current draw of about 200 mA, their run-time is not outstanding, but sufficient to allow the amplifier to settle and to quickly record data for a number of tests.

Circuit diagram and design data

The circuit diagram—simple in principle but containing a number of pitfalls—spans just three pages. It can be viewed here as a pdf file. The complete design data with KiCad schematic and board files, Gerber files, the front and rear panel artwork, including the Octave scripts for spectral analysis, is contained in this zip archive.

Circuit description

The input stage of the LNA consists of 16 parallel stages U2 to U17, each with an ADA4898-1 ultra low-noise op-amp from Analog Devices in non-inverting configuration, wired up for 20 dB of gain. Each op-amp has a voltage noise density of about 0.9 nV/√Hz and a current noise density of 2.4 pA/√Hz; for the parallel connection one therefore expects a voltage noise density of about 0.23 nV/√Hz and a current noise density of about 9.6 pA/√Hz. There is some noise contribution of the resistive feedback network ($R_{\rm f}=180\,\Omega$, $R_{\rm g}=20\,\Omega$), which results in a calculated total voltage noise density of 1.05 nV/√Hz per op-amp stage, and hence 0.26 nV/√Hz for the parallel connection. A further decrease of the resistor values in order to lower the noise, thereby lowering the op-amp load below 200 Ω, is impractical since the linear output current of the ADA4898-1 is limited to 40 mA, which would restrict the output swing but yield very little benefit.

The input bias resistor R7 for the op-amps is chosen as 10 kΩ in order to keep the input offset voltage within a reasonable range. The input is AC-coupled, with a 150 μF capacitor, leading to a lower corner frequency of about 0.1 Hz. The capacitor is a wet tantalum type, which is not cheap but has excellent electrical properties for this application. It features a very low DC leakage, is non-microphonic, and has a low ESR—which is important for an LNA since its ESR is in series with the signal source. The back-to-back input protection diodes D7 and D8 are ‘jellybean’ 1N4148 types which should not present a noise issue since they are effectively in parallel at AC with the low-impedance source, though for some critical applications, low-leakage diodes may be beneficial.

The network R8/C16 was added because the 16 parallel input stages with the ADA4898-1 exhibited a high-frequency oscillation in the single-digit MHz range, which was actually hard to detect and tended to spoil the noise floor of the amplifier due to mixing processes. This phenomenon is a well-known issue when paralleling fast op-amps with active input bias cancellation circuits, which interact with the large combined input capacitance of the parallel connection. The network effectively damps the input circuit (de-Qing), which stops the oscillation.

The 16 parallel stages U2 to U17 are connected to summing amplifier U18, which is a Texas Instruments OPA211 designed for 20 dB of gain. To counteract the large parasitic capacitance at the inverting input (summing node) of U18, which forms an additional pole with the summing resistors, capacitor C87 and the network R65/C86 together form a lead-lag frequency compensation. Together with the frequency compensation capacitors C17 to C32 of the first stage, the compensation is quite aggressive, and could probably be relaxed with some experimentation in order to increase the bandwidth of these stages.

For an LNA of this quality, the selection of passive components also plays a certain role. The resistors in the first two amplifier stages should be thin film types since these tend to have lower flicker noise compared to thick-film resistors. Moreover, they are 0.5% tolerance types to enhance gain accuracy.

The next two stages U19 and U20, which are two OPA211 in non-inverting configuration, each designed for a gain of 20 dB, can be switched into the signal path with the two reed relays K1 and K2. They are AC coupled by three 150 μF tantalum capacitors in order to avoid problems with a DC offset from the first two stages. The corner frequency of this coupling is about 0.04 Hz.

The final stage is built around op-amp U21, which is designed for a 50 Ω output impedance and an additional 6 dB of gain to compensate for the voltage drop when driving a 50 Ω load. The PCB layout allows U21 to be configured with a first-order low-pass characteristic or as a second order Sallen-Key low-pass filter. The op-amp selection is critical, especially for the Sallen-Key configuration. For a corner frequency $f_{\rm c}$ of approximately 2.5 MHz and a gain $A_{\rm v}$ of 2, the op-amp requires a gain-bandwidth product of at least $10\cdot A_{\rm v}\cdot f_{\rm c}$, i.e., 50 MHz to maintain filter shape and stability. Also, standard precision amplifiers with non-linear open-loop phase responses, such as the OPA211, are prone to oscillation in this topology. Instead, a dedicated high-speed, high-output-current operational amplifier such as the LT1360 must be used, although that was not tested.

The decoupling of U21 is critical as well, since it must drive high output currents when a 50 Ω load is connected. This is provided by the local bypass capacitors C94 and C99, as well as the two 100 μF tantalum polymer capacitors C95 and C100.

The low battery indication is implemented with an MC34161 universal voltage monitor IC from onsemi. It illuminates LED D4 as soon as either of the two voltage rails falls below ±8 V, which is suitable for 9.6 V NiMH battery packs.

The rest of the circuit is pretty much self-explanatory. However, the mechanical build and the EMI tightness of the enclosure require some care. Decoupling capacitors to ground should be connected directly at the battery charging socket. Also, the LEDs in the front panel should be shielded against external interference using some copper foil tape on the inside.

Noise spectral analysis

The primary application of this LNA is noise analysis of voltages and components, which requires a sampling device at the amplifier output. In this case I used a Batronix Magnova BMO350 oscilloscope. The Magnova is a 12-bit scope with up to 16 effective bits in HiRes mode with a filter length of 256, which still yields a bandwidth of about 2.75 MHz, which is sufficient for this application. It can record up to 327.2 Mpts using a single channel (981.6 Mpts total memory). The sampling data was transferred via LAN to the PC, which is pretty fast even for 200 or 300 MPts when data is sent in binary form.

For extracting the noise spectra from the raw measurement data, GNU Octave is used. After converting the binary data and applying the appropriate scaling (the Magnova provides a .csv-file with the relevant information), the main analysis relies on the pwelch() function from the signal processing package to calculate the power spectral density using the Welch spectral estimation method. This can then be converted to amplitude spectral density in V/√Hz. Although I also wrote a custom script using the Daniell spectral estimation method (smoothing in the frequency domain), it provides pretty much the same results for large datasets while being significantly slower due to Octave's interpreter overhead. Therefore, pwelch() is the way to go here.

I have used both the Welch and the Daniell method with a Hann window function, since this is especially well suited for noise spectral measurements. I choose the Welch window length as $2^{\lceil\log_2(f_{\rm s}/\Delta f)\rceil}$, where $f_{\rm s}$ is the sample rate and $\Delta f$ the desired frequency resolution, rounded up to the next power of 2 since the FFT used by pwelch() is then most efficient. For plots starting at 1 Hz as shown below, $\Delta f$ is chosen as 0.1 Hz. The overlap of the Welch windows is chosen as 50%.

To keep the data manageable and tidy in the final plots, a few post-processing steps are applied. First, the data undergoes logarithmic decimation (i.e., downsampling and quadratic averaging) to maintain a fixed number of frequency points per decade (50 in the plots shown below). This keeps the low-frequency resolution intact while preventing the high-frequency plot from exploding into millions of redundant data points. Also, especially at higher frequencies, a considerable smoothing of the noise curve is achieved. Next, a moving median filter is used to strip away unwanted narrowband peaks, like 50 Hz mains hum or external spikes. Finally, a Savitzky-Golay filter smooths out the remaining noise curve without washing out the actual shape or distorting the transition between 1/f and white noise.

In the noise spectral density plots shown below, a sampling rate $f_{\rm s}$ of 5 MHz is used. This leads to a Nyquist frequency of 2.5 MHz, at which the frequency response of the LNA has already rolled off sufficiently. A record length of 2·10⁸ samples, i.e., 200 MPts, is used. This is long enough to achieve sufficient frequency resolution at low frequencies for plots starting at 1 Hz. Consequently, the data acquisition for a noise spectrum only takes 40 s. This is much faster than averaging individual spectra, where averaging times of the order of 30 min or even 1 h are needed.

Performance

Noise

First, the LNA is set to 80 dB gain, and a BNC short is connected to the input. A spectral analysis of the output voltage (5 MHz sample rate, 200 MPts recorded), scaled by the LNA gain, then yields the input-referred voltage noise density of the LNA. The plot below shows the result of the Welch spectral estimation and logarithmic decimation. Up to about 100 Hz there is still some noise visible on the curve. Moreover, two spurs at the 50 Hz mains frequency and a harmonic are seen, which are likely due to magnetic coupling into the LNA circuit. The result of the Savitzky-Golay filter, which is applied after the peaks have been stripped, is also plotted. Note how it smooths out the residual noise.

The flicker corner is automatically calculated by fitting the noise model $f\mapsto A/f^\alpha+B$ to the data, which yields $B=0.29\,{\rm nV}/\sqrt{\rm Hz}$ and $\alpha=1.44$; the intersection of the $1/f^\alpha$ and the thermal noise components is indicated in the plot.

You might wonder about the noise rise in the 1/f region being much steeper (about 30 dB per decade) than specified in the AD4898-1 datasheet. This is due to the combined effect of the bipolar op-amp's relatively high current noise and the reactance of input coupling capacitor C15, which increases at lower frequencies (the datasheet curve is recorded with a dead short at the input). This can be mitigated to some extent by increasing the value of C15, or by bridging C15 if no AC coupling is needed. Note that the prices of wet tantalum capacitors rise rapidly with capacitance.

For illustration, the next plot shows the voltage noise spectral density of a short in comparison to a 50 Ω resistor. Notice that the theoretical noise of the resistor at room temperature is $e_{\rm R}=\sqrt{4k_{\rm B}RT}\approx0.9\,{\rm nV}/\sqrt{\rm Hz}$. Together with the voltage noise $e_{\rm n}$ of about $0.3\,{\rm nV}/\sqrt{\rm Hz}$ of the LNA, and a current noise $i_{\rm n}$ of about $14.5\,{\rm pA}/\sqrt{\rm Hz}$, a total noise of \[e_\text{total}=\sqrt{e_{\rm n}^2+e_{\rm R}^2+(Ri_{\rm n})^2}\approx1.2\,{\rm nV}/\sqrt{\rm Hz}\] is expected when the 50 Ω resistor is connected to the input, which is confirmed by the plot.

The current noise of the LNA was characterized by connecting a 10 kΩ resistor to the input. Together with the bias resistor R7 this means a total resistance of 5 kΩ is present at the input. Along the same lines as above, the current noise spectral density can then be calculated. It plotted below.

To check the EMI tightness of the enclosure, the following plot shows the average of 100 FFTs of the output signal with the input shorted, and with gain set to 80 dB. There are virtually no spurs except some mains-related ones, including harmonics, even though the LNA was in a lab environment with several pieces of test equipment, PCs and LED lights switched on.

Frequency response

Measuring the frequency response of a high-gain amplifier is surprisingly tricky, because this requires extremely low signal levels at the input. This problem was addressed by the following setup: A feedthrough termination and precise step attenuator were connected to the LNA input. The output was connected to an oscilloscope with Bode plot function. The reference channel for the Bode plot was connected with a BNC T-connector and via a 10:1 probe to the input of the attenuator, where also the 50 Ω generator output is connected. This way, reasonable signal levels can be measured in the reference channel.

The idea is to set the step attenuator exactly to the nominal amplifier gain, so that the Bode plotter would measure the deviation of the LNA gain from that of the attenuator. First, a normalization measurement was taken by setting the attenuator to 0 dB and by removing the LNA. This data was later subtracted from all LNA gain and phase measurements. The gain and phase deviation of the LNA from that of the attenuator is indicated in the plots below for all three gain settings of 40 dB, 60 dB and 80 dB.

As can be seen, the gain flatness is excellent. The slight jaggedness of the gain curve at 80 dB is most likely an artifact of the measurement setup, which is very delicate since it involves extremely small signal levels.

Time domain

For completeness, the following scope screenshots indicate the step response, overshoot and rise times of the LNA for 40 dB, 60 dB and 80 dB gain. The clean time-domain step response and very low overshoot corresponds to the absence of any visible peaking in the frequency response.

Input impedance

The following plot indicates the input impedance (real and complex part, and magnitude), which was calculated from a S₁₁-measurement. The input return loss (|S₁₁|) is also plotted and reveals a slightly positive value starting around 1 MHz, and rising to about 1 dB near 4 MHz. This indicates a negative input resistance component, likely due to parasitic feedback at these frequencies. The resulting conditional stability is well-controlled, as demonstrated by the excellent flatness and transient behavior when driven from most sources. However, care should be taken with highly reactive source impedances in the low MHz range.

Conclusion

In short, the setup works as intended. Despite the high gain of up to 80 dB, the amplifier remains stable in most test environments, and the noise performance is where it needs to be. It has already found a permanent spot on my test bench and is ready for daily lab use.

One practical drawback of the circuit is that it needs relatively long settling times because of the large interstage and input coupling capacitors. However, I deliberately opted against “fast-charging” circuits in order to avoid added complexity and the introduction of potential further noise sources. Moreover, allowing the circuit to warm up is beneficial in any case. The design also reveals the limitations of what can be achieved with a bipolar input stage. For instance, the 1/f noise—and its steep rise at low frequencies caused by the relatively high current noise and C15—represents an inherent weakness of this approach.